Emerging non-volatile memories such as Phase-Change Memory (“PCM”) and Memristors are likely to replace DRAM and Flash as the main data stores in future computing. Besides having the desirable characteristic of retaining data even when not powered, these emerging non-volatile memories have read speeds that are comparable to DRAM and are typically higher in real-density and hence capacity. Other key advantages include low power consumption and reduced system complexity, making them an attractive choice for a variety of electronic devices, such as mobile and handheld devices, information appliances and consumer electronics products.
These advantages come at the price of a limited write endurance (i.e., the number of rewrites a given memory cell can take) and a much higher write latency/energy (e.g., ten times higher) than read energy. Various techniques have been proposed to address these limitations, including, for example, write reduction, wear-leveling, and fault tolerance. Write reduction attempts to reduce the number of writes to the non-volatile memory, wear-leveling maximizes the useful lifetime of the memory, and fault tolerance attempts to work around failed reads or writes of data. These techniques can be used alone or in combination to improve the write-related capabilities of a non-volatile memory and therefore achieve a longer memory lifetime and overall higher performance.